Biresh Kumar Joardar
Assistant Professor
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Research
A complete list of my work is available on my
google scholar page
Book Chapter
B.K. Joardar, J. R. Doppa, P. P. Pande, “Machine Learning for Heterogeneous Manycore Design, “Embedded MachineLearning for Cyber-Physical, IoT, and Edge Computing,” In: Pasricha, S., Shafique, M. (eds), Springer, Cham
Y. Ma, B. K. Joardar, P. P. Pande, A. Joshi, "Interconnect and Integration Technology", In: Aly, M.M.S., Chattopadhyay, A. (eds) Emerging Computing: From Devices to Systems. Computer Architecture and Design Methodologies. Springer, Singapore
Journal Publications
C. Ogbogu, B. K. Joardar, K. Chakrabarty, J. R. Doppa, and P. P. Pande. 2024. Data Pruning-enabled High Performance and Reliable Graph Neural Network Training on ReRAM-based Processing-in-Memory Accelerators. in ACM
Transactions on Design Automation Electronic Systems
29, 5, Article 72 (September 2024), 29
(Highlight paper)
A. Jaiswal, K. C. S. Shahana, S. Ravichandran, K. Adarsh, H. B. Bhat, B. K. Joardar, S. K. Mandal, "HALO:Communication-aware Heterogeneous 2.5D System for Energy-efficient LLM Execution at Edge," in IEEE
Journal on Emerging and Selected Topics in Circuits and Systems
, vol. 14, no. 3, pp. 425-439, Sept. 2024
(Spotlight paper)
C. -Y. Chen, B. K. Joardar, J. R. Doppa, P. P. Pande and K. Chakrabarty, "Mitigating Slow-to-Write Errors inMemristor-Mapped Graph Neural Networks Induced by Adversarial Attacks," in IEEE
Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol. 43, no. 8, pp. 2411-2425, Aug. 2024
B. K. Joardar, J. R. Doppa, H. Li, K. Chakrabarty and P. P. Pande, "ReaLPrune: ReRAM Crossbar-Aware Lottery Ticket Pruning for CNNs," in IEEE
Transactions on Emerging Topics in Computing
, vol. 11, no. 2, pp. 303-317, 2023
C. Ogbogu, A. I. Arka, L. Pfromm, B. K. Joardar, J. R. Doppa, K. Chakrabarty, and P. P. Pande, "Accelerating Graph Neural Network Training on ReRAM-Based PIM Architectures via Graph and Model Pruning," in IEEE
Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol. 42, no. 8, pp. 2703-2716, Aug. 2023
B. K. Joardar, T. K. Bletsch and K. Chakrabarty, "Machine Learning-Based Rowhammer Mitigation," in IEEE
Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol. 42, no. 5, pp. 1393-1405, May 2023
C. Ogbogu, A. I. Arka, B. K. Joardar, J. R. Doppa, H. Li, K. Chakrabarty, P. P. Pande, "Accelerating Large-Scale Graph Neural Network Training on Crossbar Diet," in IEEE
Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol. 41, no. 11, pp. 3626-3637, Nov. 2022
B. K. Joardar, J. R. Doppa, H. Li, K. Chakrabarty and P. P. Pande, “Learning to Train CNNs on Faulty ReRAM-based Manycore Accelerators,” in ACM Transactions on Embedded Computing Systems (TECS), 2021 (as part of ESWEEK 2021).
B. K. Joardar, A. Deshwal, J. R. Doppa, P. P. Pande and K. Chakrabarty, "High-Throughput Training of Deep CNNs on ReRAM-based Heterogeneous Architectures via Optimized Normalization Layers," in IEEE
Transactions on Computer-Aided Design of Integrated Circuits and Systems
, 2021
A. I. Arka, B. K. Joardar, J. R. Doppa, P. P. Pande and K.Chakrabarty, "Performance and Accuracy Trade-offs for Training Graph Neural Networks on ReRAM-based Architectures," in IEEE Transactions on Very Large-Scale Integration (VLSI) Systems, 2021
A. I. Arka, B. K. Joardar, R. G. Kim, D. H. Kim, J. R. Doppa and P. P. Pande, "HeM3D: Heterogeneous Manycore Architecture Based on Monolithic 3D Vertical Integration," in ACM
Transactions on Des. Autom. Electron. Syst
, 26, 2, Article 16, 2021
B. K. Joardar, J. R. Doppa, P. P. Pande, H. Li and K. Chakrabarty, "AccuReD: High Accuracy Training of CNNs on ReRAM/GPU Heterogeneous 3D Architecture," in IEEE
Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol. 40, no. 5, pp. 971-984, 2021
A. Deshwal, N. K. Jayakodi, B. K. Joardar, J. R. Doppa, and P. P. Pande, “MOOS: A Multi-Objective Design Space Exploration and Optimization Framework for NoC Enabled Manycore Systems,” in ACM
Transactions on Embed. Comput. Syst
, 18, 5s, Article 77, 2019
B. K. Joardar, R. G. Kim, J. R. Doppa, P. P. Pande, D. Marculescu and R. Marculescu, “Learning-based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems," in IEEE
Transactions on Computers
, vol. 68, no. 6, pp. 852-866, 2019
Conference Publications
P. Dhingra, C. Ogbogu, B. K. Joardar, J. R. Doppa, A. Kalyanaraman and P. P. Pande, "FARe: Fault-Aware GNN Training on ReRAM-Based PIM Accelerators," 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), Valencia, Spain, 2024, pp. 1-6
C. Ogbogu,M. Soumen, B. K. Joardar, J. R. Doppa, D. Heo, K. Chakrabarty, P. P. Pande, "Energy-Efficient ReRAMBased ML Training via Mixed Pruning and Reconfigurable ADC," 2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Vienna, Austria, 2023, pp. 1-6
E. Ortega, T. Bletsch, B. Joardar, J. Talukdar, W. Paik and K. Chakrabarty, "Simply-Track-and-Refresh: Efficient and Scalable Rowhammer Mitigation," 2023 IEEE International Test Conference (ITC), CA, USA, 2023, pp. 340-349
C. Y. Chen, B. K. Joardar, J. Rao Doppa, P. P. Pande and K. Chakrabarty, "Attacking Memristor-Mapped Graph Neural Network by Inducing Slow-to-Write Errors," 2023 IEEE European Test Symposium (ETS), Venezia, Italy, 2023, pp. 1-4
C. H. Tung, B. K. Joardar, P. P. Pande, J. R. Doppa, H. H. Li and K. Chakrabarty, "Dynamic Task Remapping for Reliable CNN Training on ReRAM Crossbars," 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 2023, pp. 1-6,
B. K. Joardar and K. Chakrabarty, "Attacking ReRAM-based Architectures using Repeated Writes," 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 2023, pp. 1-6
B. K. Joardar, A. I. Arka, J. R. Doppa, P. P. Pande, "Fault-Tolerant Deep Learning Using Regularization", In 41st International Conference on Computer-Aided Design (ICCAD '22), New York, NY, USA, Article 159, 1–6.
B. K. Joardar, J. Rao Doppa, P. P. Pande and K. Chakrabarty, "NoC-enabled 3D Heterogeneous Manycore Systems for Big-Data Applications," 2022 23rd International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, USA, 2022, pp. 1-6.
B. K. Joardar, T. K. Bletsch, and K. Chakrabarty, “Learning to Mitigate Rowhammer Attacks,” in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022.
B. K. Joardar, J. R. Doppa, P. P. Pande, H. Li and K. Chakrabarty, “Processing-in-Memory enabled Heterogeneous Manycore Architectures for Deep Learning: From CNNs to GNNs,” in International Conference on Computer Aided Design (ICCAD), 2021.
A. I. Arka, B. K. Joardar, J. R. Doppa, P. P. Pande and K. Chakrabarty, “DARe: DropLayer-Aware Manycore ReRAM Architecture for Training Graph Neural Networks,” in International Conference on Computer Aided Design (ICCAD), 2021.
X. Yang, S. Belakaria, B. K. Joardar, H. Yang, J. R. Doppa, P. P. Pande, K. Chakrabarty and H. Li, “Multi-Objective Optimization of ReRAM Crossbars for Robust DNN Inferencing under Stochastic Noise,” in International Conference on Computer Aided Design (ICCAD), 2021.
B. K. Joardar, A. I. Arka, J. R. Doppa and P. P. Pande, “3D++: Unlocking the Next Generation of High-Performance and Energy-Efficient Architectures using M3D Integration,” in Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, 2021.
A. I. Arka, B. K. Joardar, J. R. Doppa, P. P. Pande and K. Chakrabarty, “ReGraphX: NoC-enabled 3D Heterogeneous ReRAM Architecture for Training Graph Neural Networks,” in Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, 2021
(Best Paper Nomination)
.
B. K. Joardar, N. K. Jayakodi, J. R. Doppa, H. Li, P. P. Pande and K. Chakrabarty, “GRAMARCH: A GPU-ReRAM based Heterogeneous Architecture for Neural Image Segmentation,” in Proceedings of 23rd IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, 2020
(Best Paper Nomination)
.
B. K. Joardar, P. Ghosh, P. P. Pande, A. Kalyanaraman and S. Krishnamoorthy, “NoC-enabled Software/Hardware Co-Design Framework for Accelerating k-mer Counting,” International Symposium on Networks-on-Chip (NOCS '19), New York, NY, USA, 2019
(Best Paper Award)
.
P. Bogdan, F. Chen, A. Deshwal, J. R. Doppa, B. K. Joardar, H. Li, S. Nazarian, L. Song, and Y. Xiao, “Taming extreme heterogeneity via machine learning based design of autonomous manycore systems,” in Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion (CODES/ISSS), 2019
B. K. Joardar, A. Deshwal, J. R. Doppa and P. P. Pande, "A Machine Learning Framework for Multi-Objective Design Space Exploration and Optimization of Manycore Systems," 2019 ACM/IEEE 1st Workshop on Machine Learning for CAD (MLCAD), Canmore, AB, Canada, 2019, pp. 1-6
B. K. Joardar, R. G. Kim, J. R. Doppa, P. P. Pande, “Design and Optimization of Heterogeneous Manycore Systems enabled by Emerging Interconnect Technologies: Promises and Challenges,” Proceedings of 22nd IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, Italy, 2019
B. K. Joardar, B. Li, J. R. Doppa, H. Li, P. P. Pande and K. Chakrabarty, “REGENT: A Heterogeneous ReRAM/GPU-based Architecture Enabled by NoC for Training CNNs,” Proceedings of 22nd IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, Italy, 2019
B. K. Joardar, J. R. Doppa, P. P. Pande, D. Marculescu and R. Marculescu, “Hybrid On-Chip Communication Architectures for Heterogeneous Manycore Systems,” Proceedings of 37th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018
B. K. Joardar, K. Duraisamy and P. P. Pande, "High performance collective communication-aware 3D Network-on-Chip architectures," 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, 2018, pp. 1351-1356
B. K. Joardar, W. Choi, R. G. Kim, J. R. Doppa, P. P. Pande, D. Marculescu and R. Marculescu, "3D NoC-Enabled Heterogeneous Manycore Architectures for Accelerating CNN Training: Performance and Thermal Trade-offs," In Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip (NOCS '17), New York, NY, USA, 2017, Article 18
S. Das, S. Chatterjee, B. K. Joardar, A. Mukherjee, and M. K. Naskar, "Physical channel modeling by calcium signaling in molecular communication based nanonetwork," In Proceedings of the 10th EAI International Conference on Body Area Networks (BodyNets ’15), Brussels, Belgium, pp. 71–77, 2015